Physical Design Resume Samples

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AK
A Kassulke
Abbey
Kassulke
682 Cydney Mountains
Los Angeles
CA
+1 (555) 827 2775
682 Cydney Mountains
Los Angeles
CA
Phone
p +1 (555) 827 2775
Experience Experience
Phoenix, AZ
Physical Design Methodology Expert Return to India
Phoenix, AZ
Crist, Nolan and Schaefer
Phoenix, AZ
Physical Design Methodology Expert Return to India
  • Work closely with Timing methodology/signoff team and design teams to improve the flow which helps faster timing closure
  • Responsible for debugging current tool and flow issues working closely with EDA vendors and drive them for new features
  • Working with the team of SOC design methodology, flow and implementation engineers
  • Work on Synthesis, Floorplan, Powerplan, Place & Route, Clock Tree Synthesis, DFY/DFM and timing closure for complex designs
  • Help, assist, resolve technical issues for flow/designs across all sites
  • Development of technology files for place and route tool
  • Work with Design and flow teams to understand the drawbacks with the current flow/methodology. Propose new methodologies to reduce the design cycle time
Chicago, IL
Power Microprocessor Physical Design Manager
Chicago, IL
Johnson LLC
Chicago, IL
Power Microprocessor Physical Design Manager
  • Manage a microprocessor team department to deliver an innovative high performance high quality design supporting IBM business goals
  • Lead and coordinate various teams and workgroups throughout the design and product delivery process to ultimately deliver high quality products
  • Capture and report status to development team leadership
  • Drive continuous transformation embracing new ideas aligned with business value and drive a high team performance culture
  • Build and grow the team through active mentoring of the current team and also recruiting top talent
  • Deliver a high quality product from prototype hardware to product launch by driving early product evaluation activity and drive AGILE practices
  • Partner with key product stakeholders inside and outside the immediate organization
present
Philadelphia, PA
Senior Manager, Asic Physical Design
Philadelphia, PA
Thiel-Jacobs
present
Philadelphia, PA
Senior Manager, Asic Physical Design
present
  • Regular management updates and project realistic schedule & highlight risks
  • Collaborate and advise design team on physical design implications for various design decisions
  • Define & implement process for physical design flow
  • Take a design from RTL to Tapeout including managing tools, flows and design issues
  • Track record of sign-off of successful ASICs or complex IP blocks
  • Perform personnel management activities including coaching/mentoring, hiring decisions, raises/promotions and performance reviews of direct reports
  • Innovate in various aspects of product development and delivery, especially in design and development processes and continual improvement
Education Education
Bachelor’s Degree in Computer Engineering
Bachelor’s Degree in Computer Engineering
University of California, Berkeley
Bachelor’s Degree in Computer Engineering
Skills Skills
  • Strong understanding of and ability to apply project management good practice as represented by PMP qualification or similar demonstrable level
  • Demonstrated ability to disseminate operational good practice through either coaching or auditing. Ability to delegate (not micro-manage)
  • Strong understanding of business processes and how the business functions
  • Commercial awareness and the ability to deal with customer efficiently is an asset
  • Strong understanding of the interactions between commercial and legal processes and project management
  • Knowledge with project management tools e.g. Microsoft Project
  • Able to plan effectively in a changing environment and to manage change effectively
  • Fluency in English is mandatory
  • Experience in working with remote team
  • Familiarity with Microsoft Office suite ( Excel, Word, Powerpoint, Outlook … )
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15 Physical Design resume templates

1

Physical Design Student Resume Examples & Samples

  • Practical electronic Engineer
  • Student with at least 2 years remaining to complete degree
  • Advantage to candidate with prior layout experience
  • Available to work 4 days a week
2

Floorplanning & Physical Design Integration DA Resume Examples & Samples

  • Expert in Industry standard solutions
  • Deep understanding of process technologies (22nm and below) and physical integration challenges
  • Expertise in timing analysis is an added advantage
  • Proficient in TCL, Perl and/or C/C++
3

Physical Design Student Worker Resume Examples & Samples

  • Engineering Students of Electronic, Electrical or Computer Engineering (at least 50% of career completed)
  • Able to work under pressure
  • Attention to details is very important
  • Full Time Job opportunities after graduation
4

Principal Engineer, Physical Design Resume Examples & Samples

  • Master’s degree and/or a Bachelor’s degree with solid experience chip development (RTL to GDSII)
  • At least 8+ years of experience with in physical design with Encounter/ICC, layout verification and static timing analysis with primetime
  • Familiarity with low power design and implementation
  • Hands on experience with running primetime and checking timing closure
  • Strong communication skill and experience in managing backend flow internally or with an external vendor
  • Excellent understanding of backend methodologies and best practices
  • Hands on experience with layout tools
  • Experience in scripting various parts of backend flows to make the process efficient
  • Mixed signal implementation experience is a plus
5

Senior Physical Design Methodology Engineer Resume Examples & Samples

  • Typically requires 7+ years of experience in CAD P&R flows, or Design P&R
  • Must have experience scripting in Tcl or Perl. Experience with Python, Makefile, C++ is a plus
  • Experience with Physical Design closure - timing, noise, physical verification, EM/IR/IVD is a plus
  • Experience using or supporting sign-off tools for design closure, or experience with methodology development for low power design and/or high performance designs is a plus
6

CPU Methodology Optimization & Physical Design Resume Examples & Samples

  • The ideal candidate should possess a BS or MS in Electrical Engineering with 5+ years of CPU PD, optimization and/or methodology experience
  • Expertise in high-performance, low-power physical design and implementation techniques with industry standard synthesis and PnR tools
  • Proficiency in using STA and power analysis tools
  • Proficiency in programming and scripting (Perl, TCL) with strong fundamentals
  • Strong understanding of logic design (RTL) and electrical fundamentals
7

Physical Design Engnieer Resume Examples & Samples

  • The ideal candidate should have 3 plus years of design implementation experience
  • Knowledge of logic design principles, physical design aspects as well as power, timing and DFT concepts
  • Experience with industry standard synthesis, physical design and STA tools
  • Scripting proficiency with TCL, Perl
  • Knowledge of circuit layout and experience with spice tools is highly desirable
  • Analytical & data mining skills to draw conclusions from large amounts of data
  • Fast learner and highly motivated to solve technical challenges using innovation
  • Strong verbal/communication skills; ability to work effectively with various functional teams and drive task to completion
8

Power Microprocessor Physical Design Manager Resume Examples & Samples

  • Manage a microprocessor team department to deliver an innovative high performance high quality design supporting IBM business goals
  • Drive continuous transformation embracing new ideas aligned with business value and drive a high team performance culture
  • Deliver a high quality product from prototype hardware to product launch by driving early product evaluation activity and drive AGILE practices
  • Lead and coordinate various teams and workgroups throughout the design and product delivery process to ultimately deliver high quality products
  • Innovate in various aspects of product development and delivery, especially in design and development processes and continual improvement
  • Partner with key product stakeholders inside and outside the immediate organization
  • Capture and report status to development team leadership
  • Perform personnel management activities including coaching/mentoring, hiring decisions, raises/promotions and performance reviews of direct reports
  • Build and grow the team through active mentoring of the current team and also recruiting top talent
  • At least 2 years experience in hardware or software development management and/or team leadership
  • At least 5 years experience in hardware or software development experience in microprocessors, servers, systems, system software stack, or applications
  • Background in Computer Engineering, Computer Science or Electrical Engineering
  • At least 3 years experience in agile development
  • At least 3 years experience in technical project management
9

Mgr, Asic Physical Design Resume Examples & Samples

  • Ability to write Verilog HDL code for commonly used logic functions and be able to use synthesis and simulation tools
  • Demonstrates good analysis & problem-solving skills. Resolves issues in creative ways
  • Strong knowledge on scripting using tcl, perl is a must
  • Should have good mentorship skill
10

Asic PnR / Physical Design Resume Examples & Samples

  • The candidate should be able to work with and lead a team of engineers on all aspects of Physical Design tasks on SOC solutions technologies
  • Should have handled Netlist to GDS II at Chip level for multiple tape outs
  • Good knowledge of EDA tools from Synopsys, Cadence and Mentor, particularly with Nitro & Calibre
  • Being proficient in TCL, Perl scripting is
  • B. Tech. / M. Tech. with 10-12 years of experience in Physical Design
11

Asic PnR / Physical Design Resume Examples & Samples

  • Handled Netlist to GDS II at Chip/block level for multiple tape outs
  • Hands-on experience on technology nodes like 28nm, 16nm and below
  • Good knowledge of EDA tools from Synopsys, Cadence and Mentor, particularly experience with Nitro & Calibre is a big plus
  • Hands-on experience in Chip/block floorplanning, placement optimizations, CTS and routing
  • Good understanding and hands on experience with physical verification(DRC/LVS/ERC/antenna) and other reliability checks(IR/EM/Xtalk)
  • Hands-on experience in block/top level signoff STA,
  • Being proficient in TCL, perl scripting is a plus
12

Senior Engineer, Physical Design Resume Examples & Samples

  • Have DRC/LVS/ERC/Antenna debugging skills
  • Knows Synopsys /Cadence place-and-route tool set and physical design project implementation
  • Familiar with synthesis, static timing analysis is an advantage
  • Familiar with RTL Design in Verilog is an advantage
  • Self-motivated team worker, good verbal and written communication skills in English
  • 3+ years relative work experiences are preferred
13

R&D Engineer on Physical Design Methodology Resume Examples & Samples

  • Physical Design and Static Timing Analysis experience (methodologies, flows)
  • Ability to automate tasks
  • Experience with analysis tools and custom implementation flows using TCL, Python, Perl, C++ or Matlab
  • Understanding of VLSI technology such as semiconductor manufacturing process, technology scaling - Experience in data mining or machine learning
14

Physical Design Expert Resume Examples & Samples

  • Full-chip experience (floor plan, layout, timing)
  • Previous experience in high speed designs, multi-voltage (low power) designs
  • Experience in advanced nodes technologies
15

Physical Design Resume Examples & Samples

  • Get into the design flow and quickly move to the topics for your thesis
  • Develop a flow, methodology or software
  • Document and present your work to the team
16

Mixed Signal Physical Design Resume Examples & Samples

  • Layout of analog building blocks like amplifiers, filters, bias, LDO
  • Layout of Mixed Signal blocks like ADC, DAC, PLL
  • Physical verification (DRC, LVS, ERC)
  • Used technologies: standard CMOS 65nm, 28nm, 16nm
17

Physical Design Methodology Expert Return to India Resume Examples & Samples

  • Working with the team of SOC design methodology, flow and implementation engineers
  • Work on Synthesis, Floorplan, Powerplan, Place & Route, Clock Tree Synthesis, DFY/DFM and timing closure for complex designs
  • Development of technology files for place and route tool
  • Work closely with Timing methodology/signoff team and design teams to improve the flow which helps faster timing closure
  • Responsible for debugging current tool and flow issues working closely with EDA vendors and drive them for new features
  • Adapting Infineon flow and tools for faster and reliable tape out of complex designs. Work as integral part of the team in Global environment
  • Help, assist, resolve technical issues for flow/designs across all sites
  • Work with Design and flow teams to understand the drawbacks with the current flow/methodology. Propose new methodologies to reduce the design cycle time
18

Manager, Physical Design Resume Examples & Samples

  • Determine and enforce to overall chip layout methodology
  • Attend and prepare for peer layout reviews
  • Assign and monitor other members of RF physical design team
  • 10 years of experience in RF or Analog physical design flows and methodologies in deep submicron CMOS (65nm and below)
  • Proven Track record of completing complex designs on time and with optimized area
  • Deep understanding of layout limitations to high frequency circuits
  • Ability to effectively work with and manage multi-site, multi-time zone teams
  • 15+ years in RF Layout (LNA, Mixer, PA, VCO, High Frequency ADC and DAC)
  • Experience in Layout of power management blocks (Buck/Boost Converters, LDOs, sub-uA Analog)
19

Physical Design Methodology Specialist Resume Examples & Samples

  • Strong experience of Digital Design Flow (RTL2GDS flow)
  • Strong experience of Physical Design methodology development
  • Strong knowledge of Synopsys physical design platform IC Compiler II
  • Strong automation skills with TCL/Perl or other programming language is necessary for this job
  • Familiarity with timing analysis specially with Synopsys STA tool PrimeTime
  • Familiarity of different Synopsys library views like liberty modes, FRAM modes, Technology files would be of additional value
  • Knowledge of Synopsys Milkyway library preparation flow would an added advantage
  • Essential knowledge of different design methodologies like Low Power, bottom up/top down hierarchical design etc
  • Ability to create detailed project plan and define different key milestones would come handy
20

Physical Design Student Resume Examples & Samples

  • Integration into a team of HW designers
  • Definition and development of automation processes in order to optimize the work within the team
  • Support for design and CAD tools that are being used by the team, mostly for Cadence environment for PCB design
  • Support existing tools and scripts, as well as development of new ones according to the emerging requirements
  • Electrical Engineering Student or Computer Science Student with background in electronics
  • Practical Engineering background is preferable
  • Ability to work as a part of a team
  • Self learning abilities is a must
  • Good knowledge of MS Office Programs
  • High level of English skills
  • Avaqilability 2.5-3 days a week
21

RF Analog Physical Design Resume Examples & Samples

  • ESD, ERC, reliability, meeting density targets, and other HVM related requirements
  • This requires extensive knowledge and practical application of methodologies and physical design
  • The candidate would also support creation of accurate schedules for planning
  • Demonstrated proficiency in ability to fully verify complex analog macros through DRC/ERC/LVS process using industry standard tools
  • Fundamental understanding of the submicron, Low Voltage, Low Power CMOS RFIC Design including common centroid layouts, matching, well isolation, and substrate and tap connections
  • Proficiency in using Cadence layout tools. Previous experience in the layout of Op-Amp, bandgap, LDO, IF Filters, VGA, VCO and PLLs
  • Good communication, problem solving and documentation skills
22

Senior Manager, Asic Physical Design Resume Examples & Samples

  • Define process, for library selection, to enable low power design
  • Work with Design team to enable appropriate design portioning/partitioning based on power & schedule
  • Collaborate and advise design team on physical design implications for various design decisions
  • Define design constraints, clock & reset requirements from PD perspective
  • Establish a process to enable ASIC vendor to reuse INFN PD work
  • Take a design from RTL to Tapeout including managing tools, flows and design issues
  • Good people management skills & ability to hire effective consultants as needed
  • Define & implement process for physical design flow
  • Ability to adjust PD work flow with project progress and overall product roadmap and make necessary adjustments
  • Effective management skills to execute on tight schedule
  • Regular management updates and project realistic schedule & highlight risks
  • 10-15 years of experience managing Physical Design team
  • Experience with all facets of ASIC Physical Design flow covering FP, CTS, Placement, Routing (local/global), Extraction, Physical Verification (LVS/DRC) & ECO handling leading to tapeout
  • Keen understanding of challenges in 16nm technology
  • Track record of sign-off of successful ASICs or complex IP blocks
  • Ability to build a PD team including managing external vendors to execute on time
  • Master’s degree in EE
23

Physical Design Methodology & Flow Development Architect Resume Examples & Samples

  • 10+years relevant industry experience with
  • SOC design flow, synthesis, PnR/extraction/power analysis tools
  • UPF
  • Design rules/DRM, calibre runs
  • Digital implementation tools from Synopsys or Cadence
  • Proficient in UNIX and Perl
  • STA and characterization, UPF/CPF views, Verilog modeling
24

Design Center Operations Manager Physical Design Group Resume Examples & Samples

  • Experience in semiconductor IP development or related field
  • Experience with project management methods and techniques i.e. Gantt Chart, Project Life Management, Risk Management …
  • Strong understanding of and ability to apply project management good practice as represented by PMP qualification or similar demonstrable level
  • Strong understanding of business processes and how the business functions
  • Strong understanding of the interactions between commercial and legal processes and project management
  • General understanding on System on Chip design threads and challenges
  • Familiarity with Microsoft Office suite ( Excel, Word, Powerpoint, Outlook … )
  • Experience in working with remote team
  • Fluency in English is mandatory
  • Demonstrated ability to disseminate operational good practice through either coaching or auditing. Ability to delegate (not micro-manage)
  • Knowledge with project management tools e.g. Microsoft Project
  • Experience in managing IP or silicon development projects
  • Knowledge of IP libraries components (Logic models, Timing , power and noise Models , Layout, Abstract) and their use in System On Chip development design flows (Simulation, Synthesis, Floor planning, Place and Route, Timing, power and noise Analysis, Physical verification)
  • General understanding of semiconductor manufacturing processes and application to IP development (Design rules, Design for Manufacturing, Spice modeling ….)
  • Commercial awareness and the ability to deal with customer efficiently is an asset
  • Able to plan effectively in a changing environment and to manage change effectively
  • Leadership ability – able to motivate and control multiple teams (across departments) to deliver challenging objectives
  • Able to make effective presentations & run meetings effectively/leading from the front
  • Committed and highly driven to achieve objectives - Able to manage tasks through to completion
  • Self-sufficient - Able to define priorities and schedule own work as well as that of others
  • Excellent interpersonal skills and collaborative work style – Job requires extensive collaboration with Customers and internal organization (Engineering, Licensing, Sales, Finance)
  • Professional attitude with strong attention to detail, process oriented and organized
  • Reliable and open-minded
  • Pro-active and pragmatic approach for problem solving. Finding solutions and driving their implementation
  • Constantly seek to develop skills of others and self. Coaches individual within Operations
  • Ability to deal with emergency, and work under pressure
  • Excellent communication skills, oral and written - Ability to express ideas effectively and produce well construct arguments. Communicates in a professional, clear and effective manner with partners
  • Able to understand commercial realities and implications for projects and customers
  • Take ownership of key areas of process/infrastructure and drives process improvements
  • Able to understand Engineering efforts and to challenge those numbers during quotation and project setup
  • Ability to achieve results without having direct control over resources. Consistently shows diplomacy to align across departments. Ability to work effectively with people and teams in multiple international locations