Layout Design Resume Samples

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L Conroy

Lyda

Conroy

969 Lang Wall

Philadelphia

+1 (555) 854 4565

969 Lang Wall

Philadelphia

Phone

p +1 (555) 854 4565

Experience Experience

New York, NY

Layout Design Engineer

New York, NY

Brekke and Sons

New York, NY

Layout Design Engineer

Team / personal development – You take time to drive your own development, while also encouraging team members and partners to do the same
Working with design lead: provide the layout team with directions on how to solve technical problems
Develop layout solutions for new products within size, performance, and schedule constraints
Provide reasonably accurate estimates of timescales for work
Team and personal development – You take time to drive your own development, whilst also encouraging team members and partners to do the same
Working with design lead: review/approve subsystem, cell and top level layout
Creativity and innovation – Possessing a passion for driving continuous improvement through spotting opportunities and seeking the views of others

Dallas, TX

Analog Layout Design Engineer

Dallas, TX

Swift-Lind

Dallas, TX

Analog Layout Design Engineer

Layout high performance Analog and Mixed Signal circuits using the latest Cadence Design Suite (IC616)
Participate in establishing CAD and layout design methodologies
Work closely with circuit designers to ensure successful project deliveries
Work at multiple levels of hierarchy, from macro level (block level) to Top-level (ESD/Pad frame)
Verify connectivity and design rules with Assura, Calibre, PVS and for legacy related work, DIVA
Createstate of the art mixed signal IC layouts
Liaise with CAD and CAE engineers to improve processes or features

present

New York, NY

Payload Layout Design Engineer

New York, NY

Hills, Hermiston and Farrell

present

New York, NY

Payload Layout Design Engineer

present

Assists in providing external product support to maintain and/or improve continued product performance and safety
Assists in providing on-going configuration refinement and production support to suppliers and manufacturers to sustain and improve production
Assists with management of supplier development, test and production activities to optimize the design and achieve program goals
Supports management of the engineering project by providing status and following the project plan
Performs routine tasks in support of refining the design configuration by following regulatory and company approved processes and procedures to ensure structural hardware compatibility and conformance to engineering definitions, with general direction
Participates in supporting proposal preparation and new business development efforts in order to grow the business. Tasks include: work statement estimates (e.g., cost, schedule, task breakdown) and marketing support
Develops, maintains and modifies basic structures/payload system and component designs, using 3-D Computer Aided Design tools (PTC Creo, CreoView), Geometric Dimensioning and Tolerancing (GD&T – ASME Y14.5M) standards and/or other design methods, to provide product definition to other engineering groups, production operations, suppliers and external customers throughout the product life-cycle

Education Education

Engineer’s Degree in Electronics

Michigan State University

Engineer’s Degree in Electronics

Skills Skills

Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment
Willingness and ability to contribute to process improvement initiatives
Enthusiastic, self-motivated, flexible with strong inter personal skills
Good communication skills, oral and written
Sufficient knowledge on sense amplifier layouts which includes transistor matching, capacitive node balancing and common centroid design techniques
Good understanding of double patterning technique used in 20nm and below nodes
Cadence skill programming (Optional)
Hands on experience in cadence Virtuoso and physical verification tools such as calibre / Hercules
Familiarity with Deep sub-micron issues encountered in 65nm, 32nm and below
Other programming skills such as PERL TCL and Python (Optional)

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15 Layout Design resume templates

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Fellow Asic / Layout Design Resume Examples & Samples

We are currently seeking a “Specialty Server” SOC / System / Product Architect focusing on our Semi-Custom product line. With a comprehensive understanding of overall business objectives and AMD’s differentiating IP portfolio, the Product Architect will be accountable for direct interface and collaboration with the customer’s CTO and architecture teams in definition of a solution and carrying that thru implementation with AMD’s engineering teams. The Specialty Server Product Architect is also responsible for technology planning and providing input to the product roadmaps the roadmap with Semi-Custom business objectives in mind
Primary technical interface with customers and business development team in exploring new business opportunities for solutions towards highly secured, highly scalable, or specialized server systems
Ensure a cohesive and long-term (4+ years) company-wide alignment with roadmap technologies and products
Collaborate with management across all AMD function, especially Engineering, global business units, Office of Strategy, and the CEO Office to set strategy, analyze and acquire external IP, calibrate product roadmaps, develop use cases, analyze the competitive environment, and strengthen external partnerships
Architect or leverage system-level hardware server platform, SOC and specialty server for datacenter, HPC, secure cloud
Ensure AMD takes full advantage of disruptive IO, memory and networking technology inflection points, standard platforms, competitive opportunities, and AMD technologies
Stay abreast of all significant industry developments, and cloud players across all segments of the industry (telcos, video distribution and transcoding, HPC, secure cloud)
Help manage and execute analysis of array of semi-custom product TCO for large installations in context of tier-1 providers product offering
Drive competitive analysis to maintain awareness across the business of where we are projected to stand relative to our main competitors on key product metrics
Minimum 5 years of experience at a Fellow / Product Architect role
Deep technical knowledge of highly scalable SOC, System and platform design as well as relevant virtualization scalability and trade-offs
Experience with motivating, and mentoring highly technical teams
Demonstrated success managing global, multi-location development teams
Strong knowledge of emerging IO, networking and specialty accelerator interfaces and understanding of industry adoption and fragmentation
Ability to collaborate in complex cross-functional teams spanning finance, strategy, legal, R&D, engineering, platform design, marketing, business to formulate, change, and execute strategies across AMD
Proven ability to effectively communicate complex technology strategies to customers and effectively interacts with technology leaders and executives in major technology companies
The ideal candidate will be well-known in the industry, AMD customers, and suppliers
Self-starter, motivated, creative. Outgoing personality. Willing to work the necessary hours and travel as needed to deliver company objectives worldwide
Excellent interpersonal and communication skills are required. Must demonstrate strong communication skills for internal and external audiences through multiple media. Must be able to work effectively in a team environment and influence high-level executives

Senior Mask / Layout Design Engineer Resume Examples & Samples

Physical layout design of SRAM, standard cell, and datapath circuits for early testchips on advanced processes using Cadence Virtuoso tools
Floorplanning and custom layout of cells and verification against design rules and schematics
Understanding and debugging design rule manual vs. DRC tool results

Director Asic / Layout Design Resume Examples & Samples

PhD with 15+ years of industrial experience or MSEE with 20+ years of industrial experience in ASIC design
Deep expertise in one of the following discipline: physical design, design verification, foundry technology
Working experience in large scale ASIC chip
Expertise in all aspects of deep submicron ASIC design flow
Proven tracking record several complete product development cycles
Demonstrate leadership and work well with cross-functional teams
Experience in managing large design team or similar organization
Experience in managing multi-culture organization a big plus
English fluency a must
LI-ZY1

Smts Asic / Layout Design Resume Examples & Samples

Working with cross-functional IP and SOC teams to define strategy for DFT/DFD architecture and design automation
Managing development of software, scripts and other support technology to enable automated construction and verification of DFT logics in complex SoC design or IP Substystems
Leading implementation of C-DFX design technology in IP Subsystems and SOC
Project management and staff planning; accountable for team’s DFX execution from feature definition phase to silicon qualification phase
Driving design/verification productivity and efficiency improvements
Working with C-DFX management staff to define goals and develop strategies for the group
Employee development (e.g. goal setting, performance management and career development plan
Minimum B.Sc in Electrical or Computer Engineering (or equivalent)
Minimum 7 years of ASIC design experience
Demonstrated leadership and works well with cross-functional teams; experience with 10+ design engineers is a plus
Experience in complex ASIC design (multi-million gates) in DFT/DFD technology such as JTAG/IEEE standards, scan and ATPG, on-chip test pattern compression and at-speed testing using PLL, memory BIST and repair, logic BIST, power-gating, on-chip debug logic, testing of high speed SerDes IO and analog design
Experience in solving logic design or timing issues with integration, synthesis and PD teams
Knowledge in EDA tools/methodology, such as synthesis, scan-insertion, equivalency checking, static timing analysis
Knowledge of C++ programming, Unix scripting languages (e.g. TCL, c-shell, Perl)
Familiar with Industry-Leading Verification Methodologies such as UVM and Formal

Senior Manager Asic / Layout Design Resume Examples & Samples

Working in close collaboration with the design engineering teams and managers and directors on the various efforts involved in the definition and implementation of various projects and scoping development efforts and project schedules
Responsible for the overall chip design and verification
Interacting with and guiding a wide variety of internal and external design and verification teams, silicon IP and tool vendors

Layout Design Engineer Resume Examples & Samples

BS or MS in EE/EET/CS or Associates EET with 5+ years of IC layout experience
Strong aptitude for IC layout and CAD-based design
Demonstrated ability to interpret design schematics, to ask clear questions, and to produce first-time-right physical designs
Good personal skills, willing to work in large teams
Fluency in the English language
Demonstrate an understanding of basic electrical components, including resistors, capacitors, inductors, and MOS transistors
Understanding of basic semiconductor processing a plus

Layout Design Engineer Resume Examples & Samples

BS and above in Electrical or Related Areas
Full-custom circuit layout/verification and RC extraction experience. Experiences in one or more of the following area is preferable
Experiences with EMIR analysis, ESD, antenna and related layout solutions is preferable
Good English skills, communication skills, and willingness to work with a global team
Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment

Wiring Harness Layout Design Resume Examples & Samples

Job Location: MBRDI Bangalore
Education and Training: BE Mechanical / Automobile / Electrical Relevant
Experience Required: Overall 3~5 yrs of domain experience in Wiring harness design/manufacturing
3+ years of experience in Siemens NX with electrical module
OEM experience with Truck/Bus background in wiring harness design
Wiring harness manufacturing knowledge will be an advantage
DFM, DFS, DFMEA knowledge
Strong automotive engineering background - Must
Create concept and detailed layouts of wiring harness
Experience in Creation of installation / Fitment drawing & Harness drawings
Japanese language skill could be added advantage
Creation of Layout, drawings & installations for Chassis, Engine & Cabin wiring harness
Planning and execution with the Offshore/Onsite Model

Layout Design Engineer Resume Examples & Samples

Simple to complex Standard cell layout design, abutment checks, P & R compatibility
Good understanding of usage of standard cells in P & R and proficiency in P & R flow is desirable
Any scripting language proficiency is also desirable

Analog Layout Design Engineer Resume Examples & Samples

BSc. in Electrical or Electronic Engineering is preferred. A minimum of two to four years industrial experience working on analog or mixed signal IC layouts
A good working knowledge of Analog IC layout and verification tools
Experience in “routing” using latest IC616 Virtuoso tools, i.e. wires, busses, pin-to-trunk, etc
Experience in schematic driven layout connectivity, e.g. VXL/GXL
Adherence to a formal layout methodology that is both robust and compatible with existing IP, thereby creating further re-useable IP blocks
An appreciation of parasitic related issues and ability to layout circuits to minimize coupling issues
A “can-do” attitude and ability to meet deadlines, with a strong desire for success
Good working knowledge of constraints-driven layout is useful but not essential
Familiarity with PCB layout software and bench test equipment is desired
Previous experience with power management applications is a plus
Candidates with experience on Eagle 364 tester and Tel P8 probers desired

Senior Eng Layout Design Resume Examples & Samples

Delivery of test-site design to support technology qualification
Closely engage with compact modelers, PDK developers and ensure specifications implemented ahead of test-chip tape-out
Automate PDK Test-site development & verification process
Create, update / track ongoing development work progress & add usage guides
Direct experience in EDA tools Cadence Virtuoso, Mentor Calibre
Direct experience in custom layout development & verification
Experience in Shell, Perl, Cadence SKILL & python programming
Preferred Qualifications: (Please list any skills or attributes you prefer that are not experienced or physical.)

Consultant for Layout, Design & Editing Resume Examples & Samples

Based on the Word-document information received for each chapter of the Report, the consultant is expected to design the layout of the report, as per format proposed by the MPTF Office Portfolio Managers, which may include photos and infographics
Based on agreed upon timeline the consultant is expected to finalize the report ensuring
Clear and legible layout of the narrative report, including table of content, quotes, notes, text-boxes and acknowledgments
Visual and aesthetic design for infographics, photos, tables and figures
Clear and accurate layout of the Financial Tables provided by the MPTF Office
Design a report that is visually appealing and easy reading to the target audience
Based on the multiple rounds of comments received, the consultant is expected to finalize the layout of the reports
Have regular telephone and email contact with the relevant MPTF Office Portfolio Manager throughout the process, as required
Strong verbal and written communication skills in English
Proven capacity to work collaboratively in a consultative team environment while taking responsibility for individual deadlines and deliverables
In-depth and up-to-date knowledge and understanding of the UN system and the mandates of consultants constituent agencies, including with UN corporate standards and language requirements; and
Strong organizational skills and readiness to work flexible hours to ensure that agreed upon timeline is adhered to
3-5 years of relevant experience designing the layout of reports in English
Experience of working with or for UN organizations; familiarity with the role and responsibilities of the MPTF Office as an Administrative Agent for MDTFs/JPs is an asset
In-depth and up-to-date knowledge using office software packages - MS Office Word, Excel, Publisher, Visio, Adobe in Design, Illustrator to create charts, diagrams, infographics, and working with high resolution pictures and images
High level of knowledge and experience of automated systems to handle the web based management systems for uploading onto the publisher’s website
Knowledge of project management, results-based reporting, monitoring and evaluation and basic financial terminology and analysis
After submitting the online form, you will be prompted to upload your CV. During the selection process, qualified candidates will be requested to complete a UNDP Personal History Form including references
Duly completed Letter of Confirmation of Interest and Availability (please find template here Letter of Confirmation of Interest and Availability template link); in a separate file include a financial proposal with “all-inclusive (*)” daily fee

Specialist, PWB Layout Design Resume Examples & Samples

Co-operation globally with product and test designers
Giving testability feedback of products
Creating test application documentation
Participation to problem solving

Analog Layout Design Engineer Resume Examples & Samples

Be responsible forimplementation and verification of IC layouts
Createstate of the art mixed signal IC layouts
Be responsible for running verification and extraction sequences
Be responsible for chip floor planning and power/clock distribution
Participate in establishing CAD and layout design methodologies
Work closely with circuit designers to ensure successful project deliveries

Layout Design Engineer Resume Examples & Samples

Engineering degree / diploma in electrical / electronic engineering
Good communication skills, oral and written
Enthusiastic, self-motivated, flexible with strong inter personal skills
Willingness and ability to contribute to process improvement initiatives
Sufficient knowledge on sense amplifier layouts which includes transistor matching, capacitive node balancing and common centroid design techniques
Familiarity with Deep sub-micron issues encountered in 65nm, 32nm and below
Good understanding of double patterning technique used in 20nm and below nodes
Hands on experience in cadence Virtuoso and physical verification tools such as calibre / Hercules
Cadence skill programming (Optional)
Other programming skills such as PERL TCL and Python (Optional)

Senior Memory Layout Design Engineer Resume Examples & Samples

Layout design is the central group, which closely work with the IP design groups. Some of the responsibilities are
Leaf cell memory design for memory compilers with proper understanding of tiling requirements to assemble memory such as connection through abutment, pins connecting from leaf to leaf at boundary, DRC on any number of adjacent cell combinations to ensure no DRC violations in leaf cell usage in compiler
Floor planning, architecture definition and physical layout implementation against the schematic design of Standard cells
Validating the layout for DRC (design rule), LVS (Layout versus schematic), DFM (design for manufacturability) ERC (electrical rule) ORC (optical rule) EM /IR (electro migration and IR drop) checks
Provide reasonably accurate estimates of timescales for work
Cadence skill programming
Other programming skills such as PERL TCL and Python

Layout Design Engineer Resume Examples & Samples

Generate Layouts for Analog/Mixed Signal ICs Layout Verification (DRC, LVS)
Preliminary floorplan, pinout, package MB diagram
Validate initial die size estimate
Interface with design lead to create and validate overall layout plan and layout schedule
Drive overall IC and subsystem layout execution, quality and coordinate activities of layout team
Implement cell, subsystem and top level layout
Working with design lead: provide the layout team with directions on how to solve technical problems
Working with design lead: define top level power and i/o routing scheme, including electro-migration and dropout/kelvin connection requirements
Working with design lead: review/approve subsystem, cell and top level layout
Highlight to design lead when subsystem, top level or individual cells require layout review

IC Layout Design Engineer Resume Examples & Samples

Working closely and interactively with IC designers
IC layout planning, signals, power, ground routings
Layout analog circuit blocks, such as ADC, DAC, PLL, Bandgap reference, PD sensors
Integrating layout at top IC level
Performing DRC, ERC, extraction, LVS at blocks levels and top IC
Document and archive layout and verification results
Communicate and align with different OS design team
Process Technology: 0.35 um, 0.18um
Familiar with Analog layout techniques such as matching, signal integrity, isolation,…
Proficient with Cadence Design Layout Environment

Layout Design Engineer Resume Examples & Samples

Product floorplanning
Cell and top level physical layout
Cell and top level verification (LVS, DRC, ERC)
Cell and top level LPE
Includes new products and modifications to existing products
Develop layout solutions for new products within size, performance, and schedule constraints
Associates minimum, BSc preferred
2+ years industry layout experience

Senior Chip Top Layout Design Engineer Resume Examples & Samples

Designs full-custom IC layout design and verification, including analog blocks and whole chip level top layout
Translates hierarchical schematics into layout with DRC LVS ANT ERC soft-check clean
Be familiar with different foundry and different process
Assists with tight tape-out schedules if needed

Layout Design Engineer Graduate IF Resume Examples & Samples

Provide custom layout for different technology processes that conforms to Cirrus Logic standards
Complete layout from base level transistor design through to block design including all back end checks for LVS, ERC and DRC
Support Physical Layout Design Engineers within the organisation
Resolve layout problems with guidance
HND/Degree in electronic engineering or equivalent experience in Physical Design/IC Layout Design
Knowledge and understanding of semiconductor design
Ability to understand new ideas and theories and adapt them to suit
Competent in basic semiconductor theory including transistors, resistors and capacitors
Prior work or internship experience preferred

Layout Design Resume Examples & Samples

Have basic semiconductor knowledge
Study and comply with business processes and design methodologies used in the division, e.g. NPI Process, Phased Design Methodology, etc
Be aware of technical issues facing division and use common solutions. Study and use Checklists, including technology process specific ones
Develop expertise in layout design of analog and mixed signal integrated circuits
Be responsible for one or more programs as defined by Layout Design Supervisor. Be responsible for the success of programs intern is involved in
Develop layout of blocks and/or top-level layout on-time, within allocated area budget, complying with defined layout density and DFM improvability expectations
Work closely with Layout Leader/Master of the project and analog circuit designers
Gather lessons learned for programs intern is involved in. Ensure all lessons learned are properly documented and are published and discussed in design team
English, written and verbal, sufficient for technical discussions

Circuit Layout & Design Engineer Resume Examples & Samples

Layout of physical designs using Cadence Virtuoso tools
DRC, LVS, and Methodology checking
Schematic and Layout extraction / netlist generation using various tools
Schematic Entry of electrical designs using Cadence Virtuoso tools
Circuit simulation for verification of design using Cadence Spectre simulation and analysis tools
Education – BSEE
Experience – 6 years of related experience. Experience with transistor level circuit physical layout and electrical design using any circuit design, simulation, and analysis tools
Travel – (% of travel required) 1%
1 year of experience with transistor level layout and circuit design using Cadence Virtuoso circuit design, simulation, and analysis tools
Circuit physical layout and electrical design experience across legacy and advance technology nodes

Payload Layout Design Engineer Resume Examples & Samples

Assists with development, maintenance and modification of structures/payload system and component designs, using 3-D Computer Aided Design tools (PTC Creo, CreoView), Geometric Dimensioning and Tolerancing (GD&T – ASME Y14.5M) standards and/or other design methods, to provide product definition to other engineering groups, production operations, suppliers and external customers throughout the product lifecycle
Assists with management of supplier development, test and production activities to optimize the design and achieve program goals
Assists in basic information search or development of a single aspect of a specific functional and physical requirements by reviewing previous designs/lessons learned, regulatory requirements, customer specifications, and/or contracts in order to support proposals, studies, and/or produce higher quality and more efficient detail designs
Assists in the preparation of preliminary design with layouts, sketches, preliminary strength analysis to support trade studies, develop structural technology, testing requirements, materials, processes, and tools, define interfaces
Prepares and documents designs using accepted design practices to meet requirements and objectives in support of product certification and delivery, with direction
Under direct guidance, supports the evaluation and resolution of production and service issues
Supports management of the engineering project by providing status and following the project plan
Assists in supporting proposal preparation and new business development efforts in order to grow the business
Tasks include: work statement estimates (e.g., cost, schedule, task breakdown) and marketing support
Adheres to all bid and proposal policies and procedures
Assists in developing tools, techniques and products in response to gaps in technology road maps, and technology needs
Assists in creating plans, schedules, and procedures for tests of structural components and systems
Supports testing (e.g. environmental simulations, functional and qualification tests)
Assists in evaluating test data to validate components and systems against design requirements and objectives
Experience do you have with geometric dimensioning and tolerance (GD&T)
Experience with a CAD tool
Experience with ProE/CREO is desired
Experience with Windchill applications is desired

Payload Layout Design Engineer Resume Examples & Samples

Develops, maintains and modifies basic structures/payload system and component designs, using 3-D Computer Aided Design tools (PTC Creo, CreoView), Geometric Dimensioning and Tolerancing (GD&T – ASME Y14.5M) standards and/or other design methods, to provide product definition to other engineering groups, production operations, suppliers and external customers throughout the product life-cycle
Performs tests to validate and verify systems and components meet requirements and specifications
Assists with supplier development, test and production activities and coordination with the supplier to optimize the design and achieve program goals
Supports investigation of emerging technologies to develop concepts for future product designs to meet projected requirements
Assists in the preparation of preliminary design with layouts, lofts, sketches, preliminary strength analysis to support trade studies, develop structural technology, testing requirements, materials, processes, and tools, define interfaces
Performs routine tasks in support of refining the design configuration by following regulatory and company approved processes and procedures to ensure structural hardware compatibility and conformance to engineering definitions, with general direction
Assists in providing on-going configuration refinement and production support to suppliers and manufacturers to sustain and improve production
Participates in supporting proposal preparation and new business development efforts in order to grow the business. Tasks include: work statement estimates (e.g., cost, schedule, task breakdown) and marketing support
Participates in developing tools, techniques and products in response to gaps in technology road maps, and technology needs
Assists with similarity and other verification analyses
Bachelor's Degree or higher is required
Experience with geometric dimensioning and tolerance (GD&T)
Experience with CAD tool
Design or analysis experience
Experience with ProE/CREO
Experience Windchill applications
Space based application is desired