Logic Design Engineer Resume Samples
4.8
(76 votes) for
Logic Design Engineer Resume Samples
The Guide To Resume Tailoring
Guide the recruiter to the conclusion that you are the best candidate for the logic design engineer job. It’s actually very simple. Tailor your resume by picking relevant responsibilities from the examples below and then add your accomplishments. This way, you can position yourself in the best way to get hired.
Craft your perfect resume by picking job responsibilities written by professional recruiters
Pick from the thousands of curated job responsibilities used by the leading companies
Tailor your resume & cover letter with wording that best fits for each job you apply
Resume Builder
Create a Resume in Minutes with Professional Resume Templates
CHOOSE THE BEST TEMPLATE
- Choose from 15 Leading Templates. No need to think about design details.
USE PRE-WRITTEN BULLET POINTS
- Select from thousands of pre-written bullet points.
SAVE YOUR DOCUMENTS IN PDF FILES
- Instantly download in PDF format or share a custom link.
TC
T Corwin
Tom
Corwin
9575 Vickie Dale
Boston
MA
+1 (555) 609 2393
9575 Vickie Dale
Boston
MA
Phone
p
+1 (555) 609 2393
Experience
Experience
Dallas, TX
Logic Design Engineer
Dallas, TX
Jaskolski Group
Dallas, TX
Logic Design Engineer
- Passionate about working in a dynamic environment where the expectation is to contribute in any activity that makes business successful
- Working with pre-silicon verification team to develop test-plans and verification collaterals
- Work with pre-silicon validation/verification team to develop test plans and verification collaterals
- Work with post-silicon validation teams to resolve silicon level sightings
- Working with structural design engineers physical design to converge timing
- Working with the physical design team for floor-plan and timing convergence
- Working with pre-silicon validation engineers to validate the design and fix design bugs
Houston, TX
IP Logic Design Engineer
Houston, TX
Strosin Inc
Houston, TX
IP Logic Design Engineer
- Working with pre-Silicon validation engineers to develop cluster level directed/random tests and environments
- Work with team to develop IP block/reference design and get it pass validation
- Work with team to define IP block and reference design architecture
- Defining micro-architecture, implementing RTL in System Verilog and working closely with functional validation and RLS team to converge design
- You will provide IP integration support to SOC customers and represent RTL and the IP team
- You will provide IP integration support to SoC customers and represent RTL team
- Developing the micro-architectural specification of complex design block(s)
present
Houston, TX
SOC Logic Design Engineer
Houston, TX
Rutherford-Walsh
present
Houston, TX
SOC Logic Design Engineer
present
- Develop, review, and update specifications
- Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results
- Identify design execution risks and execute mitigation/contingency plans
- Provides IP integration support to SoC customers and represents RTL team
- Participates in the development of Architecture and Microarchitecture specifications for the Logic components
- Implement and update specifications
- Design functional logic including chip level clock and reset controllers
Education
Education
Bachelor’s Degree in Electrical Engineering
Bachelor’s Degree in Electrical Engineering
Kent State University
Bachelor’s Degree in Electrical Engineering
Skills
Skills
- Good understanding of design flows, synthesis, timing analysis, logic simulations, verification, and basic scripting knowledge
- Strong in digital logic design with in-depth knowledge of Verilog or HDL
- Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment
- You like the idea of working in a Startup atmosphere inside a stable and leading corporate
- Basic understanding of SPICE based simulator tools
- Good communication skills
- Proficiency in MCU design/coding is
- Non-volatile memory design experience
- 5+ years’ experience in frontend design
- Experience with schematic capture tools like Mentor/Cadence
13 Logic Design Engineer resume templates
Read our complete resume writing guides
1
Logic Design Engineer Using Systemc for the Computer Vision Group Resume Examples & Samples
- Minimum 4 years of experience in RTL Design
- Experience in synthesis and development of timing constraints
- Experience with ASIC and/or SoC design flows and methodology
2
IP Logic Design Engineer Resume Examples & Samples
- Working with pre-Silicon validation engineers to develop cluster level directed/random tests and environments
- Ability to work well in a diverse team environment
- ASIC and/or SoC Design, RTL level Digital IC Design using System Verilog and/or Verilog
- Languages and standards such as Verilog, System Verilog, Perl, Shell scripting, UPF, OCP, PCIe, IOSF
- Unit level validation environment development, test plan generation and test case implementation for the verification of design block(s)
- Industry standard design development tools and methodologies
- Logic simulation tools such as VCS
- Synthesis and Static Timing Analysis (STA) with Design Compiler and Primetime. Working knowledge of Conformal, CDC, Spyglass-LP, Spyglass-DFT, Caliber and other frontend/backend design quality check tools
3
Logic Design Engineer Resume Examples & Samples
- Experience with logic design and validation tools and methodologies including: Verilog*, System Verilog*, SVA, Synopsis VCS
- Experience with validation System Verilog based
- Experience with LINT and formal verification tools
- Design knowledge in the areas synthesis and timing
4
IP Logic Design Engineer Resume Examples & Samples
- Master of Science Degree in Electrical or Computer Engineering
- 5+ years of experience in Front End Development
- 5+ years of experience in RTL Development
- 5+ years of experience with Specman based Validation
- 5+ years of experience with RTL Level Digital IC Design using System Verilog, Verilog and VHDL
- 3+ years of experience with Validation using Specman and OVM
- 3+ years of experience with OCP and AXI Bus Protocols
- 3+ years of experience with SOC integration and RTL development
- 3+ years of experience with industry standard FE Development and Verification Tools and Methodologies
- Experience with languages such as C and/or C++, SystemC, System Verilog*, Perl, Shell scripting
- Experience in some of the following areas/tools: Synthesis, Formal Verification, DFT, VCS*, PrimeTime, Design Compiler, Jasper, 0in. UPF
- Experience with Low Power Design and Power Management. A self-starter with the ability to assume leadership roles
5
Senior Logic Design Engineer Resume Examples & Samples
- B.S. or M.S. Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
- 4+ years of logic design experience
- 4+ years of VLSI design flow experience (lint, formal equivalence, formal verification, synthesis, static timing analysis (STA), design for test (DFT), physical design/layout)
6
Senior IP Logic Design Engineer Resume Examples & Samples
- A strong background in RTL level Digital IC Design using System Verilog and/or Verilog
- Experience with languages and standards such as Verilog, System Verilog, Perl, Shell scripting, UPF, OCP, PCIe, IOSF
- Experience with industry standard design development tools and methodologies
- Working knowledge of Synthesis and Static Timing Analysis (STA) with Design Compiler and Primetime. Working knowledge of Conformal, CDC, Spyglass-LP, Spyglass-DFT, Caliber and other frontend/backend design quality check tools
7
Logic Design Engineer Resume Examples & Samples
- Basic knowledge in Hardware Development
- Basic knowledge in having very good communication skills, used to work in a global team
- German: Fluent
8
Senior Logic Design Engineer Resume Examples & Samples
- Own and be responsible for delivery of a specific unit on the chip
- Write readable high performance and low power RTL
- Synthesis and Timing closure
- Write design documents
- Work with verification to verify correctness of your unit
- Work with implementation to achieve timing, area, performance and power goals
9
Logic Design Engineer Resume Examples & Samples
- Working with IP designers and DFx engineers to define and scope design requirements and develop specifications for testing a given IP on a test chip
- Implementing the above mentioned spec/design in RTL
- Working with pre-silicon verification team to develop test-plans and verification collaterals
- Working with the physical design team for floor-plan and timing convergence
- Working with post-silicon validation teams to resolve silicon-level sightings
- Working with IP designers and 3rd party IP vendors to define and develop specifications for evaluating/testing inter-operability of soft IPs (eg. DDR memory controllers) with Intel Hard IP
- Bachelor or Master’s degree in Electrical or Computer Engineering with at least 4+ years of relevant industry experience in
- Previous experience with ASIC and/or SoC design flows and methodology, including CPF/UPF flows
- Scripting abilities (perl/tcl)
- Strong written/verbal communication skills are a must, as you will be working, influencing and collaborating with teams in distributed locations
10
Senior Logic Design Engineer Resume Examples & Samples
- At least 5 years of experience as a logic designer
- Able to independently solve problems, define milestones, drive to closure
- EE/CS/CE from accredited university
11
Nand Logic Design Engineer Resume Examples & Samples
- Architects, designs and verifies circuits, logic, systems, algorithms, etc. to meet product requirements
- Be responsible for mixed-signal chip's logic design and verification, including block level specification, micro architecture design, RTL coding and verification, synthesis and power and static timing analysis
- Own the design of all digital blocks in flash memory. Applicant should have basic technical skills on how to design digital block, have working knowledge of general integrated circuit design flow and EDA tools with some work experience
- Strong Verilog coding and RTL design skills
- Familiar with digital simulator, Synopsys synthesize and timing analysis tools
- Familiar with IC design flows
- Familiar with perl language or C++, tcl script is preferred
- Dedicated, hard working and good team player
- Posses good interpersonal as well as good communication skills
12
IP Logic Design Engineer Resume Examples & Samples
- Engage customer to understand customer’s need about IP or reference design
- Work with team to define IP block and reference design architecture
- Work with team to develop IP block/reference design and get it pass validation
- Engage customer’s technical influencer to drive IP and reference design’s adoption
- Build collateral and guide customer to use our IP block and reference design
- Assist debugging with customer’s design and clarify issues when Intel IP blocks are used
- Consolidate feedback to contribute to product definition
- Must have a Masters or PhD in Computer Science, Computer Engineering, Electrical Engineering or related fields
- Discipline, result orientation and ability to work in a dynamic team environment
- Good English and Mandarin communication skills, both written and oral
- Solid FPGA/ASIC design skill
- Knowledge of CPU architecture, general GPU architecture, and network accelerators
- Knowledge of heterogeneous (FPGA, CPU, GPGPU) hardware systems
- Subject matter expertise in a particular class of algorithms, e.g. ML/DL, cryptography, compression, image & speech processing, packet processing, and etc
- Knowledge in latest design methodology like CUDA, OpenCL and HSA
13
SOC Logic Design Engineer Resume Examples & Samples
- Strong problem-solving & debugging skills
- Solid verbal and written communication skills
- At least 6 years of experience in Digital design (including RTL, Verilog)
- Circuit design (understanding of clocking, basic circuits, timing issues)
- Working knowledge of ASIC Design Flow
- Knowledge of computer architecture
- Experience debugging logic in a simulation environment
- SystemVerilog
- Protocols: Bus, storage and DDR
- Low-power design
14
IP Logic Design Engineer Resume Examples & Samples
- Candidate should possess a Bachelor's in Electrical Engineering or Computer Science with 6 years and/or a Master's degree in Electrical Engineering or Computer Science or similar degree with 4 years of VLSI Front-end experience
- Extensive knowledge of System Verilog and working knowledge of verification methodologies like OVM and UVM
- Good knowledge on functional and code coverage
- Adept in programming and/or scripting (C++, Perl* and others) and be conversant with flows and tools for VLSI logic design and/or functional verification
- Sound understanding of logic design fundamentals encompassing state machine verification, complex protocol verification, functional test strategies, directed and stress test generation, verification infrastructures and verification and/or debug flows
15
Coherency Fabric IP Logic Design Engineer Resume Examples & Samples
- Work closely with architects and verification engineers to generate micro-architecture
- 6+ years of work experience in processor micro-architecture and RTL design
- Proven micro-architecture design experience of major CPU blocks
- Expert knowledge of coherency protocols and cache controller design
- Expert-level System Verilog RTL coding skills
- Good understanding of RTL verification flow and environments (e.g., OVM, hardware modeling, and
16
IP Logic Design Engineer Resume Examples & Samples
- Experience working with Logic Design and Hardware Description Languages (System Verilog, Verilog) Knowledge of internal and external logic design tools and flows
- Experience in networking hardware design Adept in programming and/or scripting (C++, Perl* and others) and be *conversant with flows and tools for VLSI logic design and/or functional verification
- The candidate should be able to work independently with ownership, lead/mentor junior engineers
- Requires good communication skills as the role involves customer interaction
- Intel Chassis architecture, IOSF spec, UPF methodology, Intel tools and methodologies used for IP Development
- Masters in Electrical Engineering preferred
17
Logic Design Engineer Resume Examples & Samples
- Be a team player and be versatile and willing to take on new challenges as they arise
- An independent, motivated team player with leadership qualities
- Able to drive/influence issue resolution and proficient in stakeholder management
18
SOC Logic Design Engineer Resume Examples & Samples
- Drive global integration logic design to meet customer requirements and milestone deliverables
- Identify design execution risks and execute mitigation/contingency plans
- Review vendor capability to support development
- 4 plus years of experience in design-for-test, design-for-debug logic scan, BIST, TAP, JTAG design/implementation to meet manufacturing requirements and milestone deliverables
- 3 plus years of experience in effective leadership with influence across cross-discipline/program initiatives
- Excellent analytical ability, problem solving and debug skills
19
Logic Design Engineer Resume Examples & Samples
- Masters degree in EE required
- Strong in digital logic design with in-depth knowledge of Verilog or HDL
- Good understanding of design flows, synthesis, timing analysis, logic simulations, verification, and basic scripting knowledge
- Basic understanding of SPICE based simulator tools
- Experience with schematic capture tools like Mentor/Cadence
- Non-volatile memory design experience a plus
- Proficiency in MCU design/coding is a plus
20
Logic Design Engineer Resume Examples & Samples
- Research and/or development experience in one or more of the following areas
- Logic design on the basis of the target system specification
- Mixed-signal design on advanced technologies
- Proficiency in programming and/or scripting languages is a plus
- Knowledge on Protocols, High Speed Serdes or DDR is a plus
- Experience in one or more of the following application domains, is a plus
- High performance computing system, processor, chipset and ASICs
- High end communication, networking, mobile and data center applications
- Digital signal processing, sensor and Internet of Things
- Other emerging IT technology and industry areas
21
IP Logic Design Engineer Resume Examples & Samples
- Defining micro-architecture, implementing RTL in System Verilog and working closely with functional validation and RLS team to converge design
- You will also have an opportunity to work on high-level understanding of the architecture
- You will contribute to specifications at multiple levels, including the HAS and MAS microarchitecture spec
- You will provide IP integration support to SoC customers and represent RTL team
- Micro-architecture trade-offs and documentation
- Low-power design using UPF and clock gating Multiple clock domain design
- State machine design
- Simulation and debug experience using VCS/Verdi
- Customer support and debug for SOCs
- Perl / C-shell Standard SOC Design tools and methodologies at Intel
22
Senior SOC Logic Design Engineer Resume Examples & Samples
- Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
- Drive logic design to meet customer requirements and milestone deliverables
- Collaborate closely with architecture, logic, validation, and physical design discipline leads to drive design strategy and execution
- Represent the logic design team in technical forums and influence key stakeholders
- 6 plus years of experience in ASIC or SOC Design
- 6 plus years of knowledge and experience in industry standard tools and flows for RTL to silicon design and verification
- 4 plus years of experience in effective leadership with influence across cross-discipline/program initiatives
- Master’s Degree preferred
- Experience with SoC and IP design integration
- Demonstrated leadership in pre-silicon design
- Experience with interconnect fabric architecture
- Good written and verbal communication to concisely and accurately communicate complex issues
- Disciplined, motivated and innovative, with a focus on quality
23
SOC Logic Design Engineer Resume Examples & Samples
- Configure and verify complex IP and integrate into an effective subsystem
- Design functional logic including chip level clock and reset controllers
- Synthesize RTL to meet timing requirements and verify logical equivalency
- Work effectively with a global team and be self-motivated to manage deliverables
- Education – BS or MS (preferred) in Electrical Engineering
- Experience – 10+ years of related work experience required
- Language Fluency – Fluent in English Language (written & verbal)
- Experience in SOC level (rather than block level) integration of ARM-based SOCs
- Experience with industry standard interfaces such as DDR, PCIE, Ethernet, and USB
- Experience writing assertions
- Proficient programming in scripting languages such as tcl and Perl
- Experience creating and using IP-XACT component descriptions
- Experience supporting hardware emulation
- Exposure in low power design
- Familiarity with TLMs
24
Logic Design Engineer Resume Examples & Samples
- Strong interpersonal, organizational and communication skills – a must!
- Team Player, Persuasive, encouraging, and motivating
- Open minded, quick learner, creative, likes challenges
- Experience at working both independently and in a team-oriented, collaborative environment is essential
- Minimum of 5 years of demonstrated experience in FPGA or ASIC design
- Ability to effectively prioritize and execute tasks in a high-pressure environment
- Knowledge of FPGA tools such as Quartus, Vivado, Modelsim, Signal tap, and Chipscope
- Ability to write timing contraints and designs that repeatedly achieve timing closur
- Experience with Monitoring and/or Test & Measurement tools
- Experience with one or more of the following protocols: PCIe, USB, SAS, SATA, Infiniband
- BS in EE, CS or Computer Engineering – a must
- MS in EE is a plus
25
IP Logic Design Engineer Resume Examples & Samples
- Collaborating with cross discipline stake holders in defining micro-architecture, implementing RTL in System Verilog, validating the design, synthesizing the design and closing timing
- You will also have an opportunity to work on high-level understanding of the architecture and transistor level analog circuit implementation
- You will contribute to specifications at multiple levels, including the HAS and MAS micro-architecture spec
- You will provide IP integration support to SOC customers and represent RTL and the IP team
- You will mentor and train junior engineers in the IP team from different disciplines
26
Logic Design Engineer for High Speed Serial IO Resume Examples & Samples
- BSEE with 6 years' experience or MS EE with 4 years of experience in the area of
- Experience in IO design and DSP type logic is preferred
- 5+ Years of relevant industry experience
27
Logic Design Engineer Resume Examples & Samples
- Developing understanding of the design architecture and contributing at multiple levels on the micro-architecture features and specification
- Implementing block/sub-system level logic design RTL using System Verilog
- Working with pre-silicon validation engineers to validate the design and fix design bugs
- Working with structural design engineers physical design to converge timing
- You must be able to balance design trade-offs with modularity, scalability, DFX requirements, chassis compliance, power, area, and performance
28
SOC Logic Design Engineer Resume Examples & Samples
- Education – BS in Electrical Engineering
- Experience – 8+ years of related work experience required
- MS in Electrical Engineering Preferred
29
SOC Logic Design Engineer Resume Examples & Samples
- Work effectively with a global team and be self-motivated to manage deliverables. Communicate clearly both verbally and in writing
- Perform all activities in safe and responsible manner and supportall Environmental, Health, Safety & Security requirements and programs
- 6 years of relevant experiences
- MS in Electrical Engineering preferred
30
Logic Design Engineer Resume Examples & Samples
- Driving micro-architecture specification or pre-silicon verification for PLL/clocking and encryption based design solutions
- Close collaboration with architects, logic designers and circuit designers Developing Register Transfer Level (RTL) coding and/or pre-silicon validation environment/test-bench The Lead engineer will interface with external/internal customers, IP Developers, SoC integration teams on Front End Technical issues
- This individual will closely work with customer on Hard-IP definition/architecture comprehending IP functionality, clocking, logic design, DFX requirements and Full Chip integration of IP/IO blocks
- The successful candidate will demonstrate an expert command of IO IP architecture, SOC integration requirements for HIP-Front End, understand clocking, verification and timing closure requirements
- Proven ability to cross domains from pre-silicon design/arch to post-silicon problem solving and solution space The successful candidate requires a strong technical background in micro-architecture design, frontend/verification methodology
- Passionate about working in a dynamic environment where the expectation is to contribute in any activity that makes business successful
- Bachelors of Science in Electrical Engineering, Computer Engineering or Computer Science with 6 years of experience or Masters of Science degree in Electrical Engineering, Computer Engineering, or Computer Science with 4 years of experience
- Strong work experience with Uarch/RTL or pre-silicon verification experience
- PhD in Electrical Engineering, Computer Engineering, or Computer Science
- Strong uArch/RTL experience
31
SOC Logic Design Engineer Resume Examples & Samples
- Implement and update specifications
- Education – B.S. Degree
- Experience – 0-2 years of relevant work experience
- Travel – (less than 5% of travel required)
32
High Speed IO Logic Design Engineer Resume Examples & Samples
- Experience with Hardware Description Languages System Verilog is required
- Experience working with some or multiple layers of an IO protocol stack e.g. PCIe, Intel QPI/UPI, 802.3 Ethernet, SAS/SATA, USB is highly desirable
- Experience with scripting languages e.g. Perl, shell*, Python is highly desirable
- Excellent communication, leadership, and interpersonal skills are expected
33
Logic Design Engineer Resume Examples & Samples
- Bachelors in Electrical Engineering or Computer Engineering with 3 years of experience, MS, or PhD degree in Electrical Engineering or Computer Engineering with 2 years of experience
- Understanding of Low power design, understanding analog design concerns and driving to an optimal solution between analog and digital designs, familiarity with pre-silicon and post-silicon validation
- Experience in the following areas/ skills are desired: Logic design using System Verilog Micro-architecture trade-offs and documentation
- Low-power design using UPF and clock gating Multiple clock domain design State machine design
- Simulation and debug experience using VCS/Verdi Synthesis and speed path debug Perl / C-shell
- Strong background in RTL level Digital IC Design using System Verilog and/or Verilog
34
Logic Design Engineer Resume Examples & Samples
- Design and test FPGA circuitry for next generation Test and Measurement Tools for Ethernet and Fibre Channel market
- Define logic architecture of various blocks of the design
- Design these blocks using Verilog and verify their block level functionality through simulation
- Document the design and review with the rest of the team
- Drive FPGA tools to compile the code and ensure timing closure
- Verify proper operation of your circuit via system level test with test hardware
- Work with the verification engineer to validate your circuit in a whole chip simulation environment
- Reproduce customer environment to reproduce any failures found in the field
- Fix the RTL, recompile the FPGA and review the changes with the team
- Minimum of 7 years of demonstrated experience in FPGA or ASIC design
- Strong understanding of Ethernet and Fibre Channel protocols and usage in industry
- Ability to write timing contraints and designs that repeatedly achieve timing closure
35
Logic Design Engineer Resume Examples & Samples
- Excellent written and verbal communication skills are critical on a small, fast-moving team
- As part of a growing, dynamic new business, the candidate must be successful working with a small team and manage multiple tasks and changing requirements, in an innovative environment
- Bachelors in Electrical Engineering or Computer Engineering with 8 years of experience, MS, or PhD degree in Electrical Engineering or Computer Engineering with 6 years of experience
- Low power design, understanding analog design concerns and driving to an optimal solution between analog and digital designs, familiarity with pre-silicon and post-silicon validation
- Experience in the following areas/ skills are desired: Logic design using System Verilog Micro-architecture trade-offs and documentation Low-power design using UPF and clock gating
- Multiple clock domain design State machine design Simulation and debug experience using VCS/Verdi Synthesis and speed path debug Perl / C-shell
- 10+ years of relevant industry experience
36
Logic Design Engineer Resume Examples & Samples
- Define micro-architecture, write block/IP level specifications and logic design
- Implement specifications/design in RTL
- Work with pre-silicon validation/verification team to develop test plans and verification collaterals
- Work with physical design team for FP & timing aware logic design
- Work with post-silicon validation teams to resolve silicon level sightings
- Oversees definition, design, verification, and documentation for an IP/Subsytem/SoC development
- Defines module interfaces/formats for simulation
37
IP Logic Design Engineer Resume Examples & Samples
- Debugging and interpreting quality tool flow and outputs
- Clock crossing checks
- Timing exception verification- DC, Linting tools
- System Verilog programming experience
- Scripting languages: Perl, TCL, Python
38
Senior Logic Design Engineer Resume Examples & Samples
- Strong skills in debug, failure re-creation and root cause analysis
- Applicant should have efficient debugging and logic skills. Familiarity with major simulation and debug tool vendors is a plus
- Deep expert knowledge of SoC Microarchitecture and Implementation possibilities
- Clear understanding of Automotive MCU Customer expectations
- Very good communication and networking skills
- Very good English language skills
- 5+ years in design and debug of Clocking and Power management is required
- System Level Design understand of methods is a plus
- Expert level experience in design methods and tools is required
39
SOC Logic Design Engineer Resume Examples & Samples
- Perform logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs
- Participates in the development of Architecture and Microarchitecture specifications for the Logic components
- Provides IP integration support to SoC customers and represents RTL team
40
Junior Logic Design Engineer Resume Examples & Samples
- Read datasheets and user guides for (ADC/DAC/PLL) devices and determine the steps required to configure these programmable devices
- Bring-up and test new boards, configure the programmable devices, characterize the data convertors performance, and make the necessary adjustments to the FPGA design to interface to the hardware properly
- Consult with hardware engineers and other engineering staff to evaluate interface between hardware and software, and operational and performance requirements of overall system
- BS/MS in Electrical or Computer Engineering
- Knowledge of engineering design techniques, tools, and principals involved in FPGA designs
- Hands on experience in VHDL/Verilog logic design, simulation, synthesis
- Familiarity with Xilinx FPGAs architecture
- Familiarity with Multi-clock domain logic design
- Hands on debug and troubleshooting skills and ability to utilize advanced instrumentation in design characterization
- Must be a self-starter, highly motivated and be able to work with little supervision in an environment of a small and highly dynamic company
- Developing DSP algorithms using MATLAB with Xilinx SysGen
- Programming skills in C/C++
- Sense of urgency and ability to multi-task while remaining calm under the pressure
41
Senior Logic Design Engineer Resume Examples & Samples
- Develop firmware in VHDL/Verilog to interface a variety of analog and digital peripherals to Xilinx FPGAs
- Analyze software requirements to determine feasibility of design within time and cost constraints
- Document interfaces for internal and external use by DSP and software engineering team
- Consult with customers concerning maintenance, operation, or custom firmware development
- Minimum of 5 years experience in logic design in VHDL/Verilog
- Comprehensive Xilinx Virtex-6/7 Series/Zynq/Ultrascale or equivalent Altera FPGA part, and/or ASIC design experience
- Familiarity with high speed signal acquisition and processing, Multi-clock domain logic design, high speed ADC/DAC interface logic, various types of memory (DDR2/3, QDR, etc...) interfaces and controllers
- Hands on experience in at least one of these high speed interfaces (PCIe, Aurora, SRIO, JESD204B)
- Strong experience in writing test benches and verification platforms
- Excellent hands on debug and troubleshooting skills and ability to utilize advanced instrumentation in design characterization
- Excellent verbal and written communication skills. Must be able to drive a project from the concept and design phase all the way to production
- Must be a self-starter, highly motivated and be able to work with little or no supervision in an environment of a small and highly dynamic company
- Embedded systems and logic development using Xilinx EDK/SDK, Vivado
- Script writing knowledge in Tcl, Python, Perl, and Shell
- Ability to read datasheets and determine the steps required to configure programmable devices
- Good understanding of hardware aspects of electronic designs
- Ability to apply critical thinking skills and solve problems
42
Senior SOC Logic Design Engineer Resume Examples & Samples
- SOC logic integration using reusable connectivity collateral
- Spec to design automation (example scalable NOC insertion in SOC)
- Microarchitecture and development of pervasive SOC IPs and flows
- End to end technical support on the SOC from concept to production
- Automating complex front end tasks required to implement the SOC (example pin muxing) and data mine for quality checks
- Create design methodology standards and automate checks for IP and SOC compliance
- Run formal analysis tools hierarchically on SOC RTL/gate views for lint, CDC, RDC, reset/clock glitch analysis, power etc. Generate collateral for downstream teams (verification/physical design) from such analysis
- Generate design database data driven live dashboards for quality metrics
- Knowledge of IP-XACT and IP reuse standards and trends
- Experience trail blazing/benchmarking new tools/flows and creating cookbooks to disseminate to downstream teams (eg formal analysis tools, design flow automation, compile checks, lint checks etc. )
- Low power design techniques
- Subsystem and chip level timing closure experience. Knowledge of synthesis pragmas and constraints and synthesis/simulation mismatch pitfalls
- Understanding of SOC glue logic around DFT (DC/AC scan), M/L-BIST, SOC clocking, reset, Device POR sequencing, power management, JTAG, Debug Run-Control and non-intrusive Debug Trace are highly desirable
- Logic Design with Verilog RTL and SVA
- Unix and Scripting (shell, awk, perl, C/C++, tcl/TK) guru
- RTL and Gate simulation and debugging and equivalency checking experience
- Background in computer architecture, NICs/NOCs, cache coherency protocols and ARM Architecture knowledge and exposure to a wide variety of on-chip peripherals/HSSI/slow bus interfaces is a plus
- BS/MS in Electrical Engineering with 7/5+ years of relevant experience
43
Senior Logic Design Engineer Resume Examples & Samples
- Design and test FPGA circuitry for next generation Test and Measurement Tools
- Define logic architecture of various blocks of the design.Design these blocks using Verilog and verify their block level functionality through simulation. Document the design and review with the rest of the team. Drive FPGA tools to compile the code and ensure timing closure. Verify proper operation of your circuit via system level test with test hardware. Work with the verification engineer to validate your circuit in a whole chip simulation environment
- Work with customer support to reproduce and fix issues found in the field
- Reproduce customer environment to reproduce any failures found in the field. Fix the RTL, recompile the FPGA and review the changes with the team
- Strong interpersonal, organizational and communication skills – a must. Team Player, Persuasive, encouraging, and motivating. Open minded, quick learner, creative, likes challenges. Experience at working both independently and in a team-oriented, collaborative environment is essential. Minimum of 5 years of demonstrated experience in FPGA or ASIC design. Ability to effectively prioritize and execute tasks in a high-pressure environment. Knowledge of FPGA tools such as Quartus, Vivado, Modelsim, Signal tap, and Chipscope. Ability to write timing contraints and designs that repeatedly achieve timing closure. Experience with Monitoring and/or Test & Measurement tools. Experience with one or more of the following protocols: PCIe, USB, SAS, SATA, Infiniband. Education:BS in EE, CS or Computer Engineering – a must. MS in EE is a plus
- Teledyne is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, gender, sexual orientation, gender identity, gender expression, transgender, pregnancy, marital status, national origin, ancestry, citizenship status, age, disability, protected Veteran Status, genetics or any other characteristic protected by applicable federal, state, or local law. If you need assistance or an accommodation while seeking employment, please email teledynerecruitment@teledyne.com or call (805)373-4545. Determinations on requests for reasonable accommodation will be made on a case-by-case basis. Please note that only those inquiries concerning a request for reasonable accommodation will receive a response
