SOC Design Engineer Job Description

SOC Design Engineer Job Description

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SOC design engineer provides methodology and flow guidance for assembly level integration, including design planning and assembly level physical verification.

SOC Design Engineer Duties & Responsibilities

To write an effective SOC design engineer job description, begin by listing detailed duties, responsibilities and expectations. We have included SOC design engineer job description templates that you can modify and use.

Sample responsibilities for this position include:

Manage and solve synthesis correlation issues with internal team and client
Perform FPGA synthesis, place & route and timing optimization
Performs all aspects of the SoC design flow from high-level design planning of assembly levels, floor-planning to synthesis, place and route, timing and power and other backend electrical verification tools to create a design database that is ready for manufacturing
Working with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis
Fullchip and block synthesis and assembly and associated collateral responsibility for the SoC
Block partitioning and constraint development for synthesis working in conjunction with floorplanner
Synthesis, STA, CDC analysis, linting, ECO generation and implementation in netlists - everything it takes to get a high quality netlist to the structural design team
Responsible for RTL to GDS flow including CPF definition, logic/physical synthesis, die size estimation, floor-planning, power planning, CTS, place and route, STA, signal integrity, timing closure, formal verification, DFM, DRC/LVS
Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors within the company
Modeling and analyzing the power consumption of each on-die component including the CPU, IO controllers, IO interfaces, sensors, and interface logic

SOC Design Engineer Qualifications

Qualifications for a job description may include education, certification, and experience.

Education for SOC Design Engineer

Typically a job would require a certain level of education.

Employers hiring for the SOC design engineer job most commonly would prefer for their future employee to have a relevant degree such as Master's and Bachelor's Degree in Computer Engineering, Electrical Engineering, Design, Engineering, Computer Science, Electronics Engineering, Electronics, Communication, Science, Computer

Skills for SOC Design Engineer

Desired skills for SOC design engineer include:

Perforce
RTL integration and validation methodologies
Areas of timing model generation
Physical verification & EMIR
Chip level Design and Integration activities
DesignSync
Synthesis
System C
Semiconductor device physics
ASIC design flow

Desired experience for SOC design engineer includes:

Completed coursework or classroom projects using C, C++, PERL, Python, or TCL programming
Completed coursework or classroom projects to demonstrate understanding of CMOS transistor-level circuit design fundamentals
Providing the electrical analysis needed to make tradeoff decisions related to SoC architecture design choices
Modeling and validating the pre-Silicon power estimates and dependencies on process, voltage, temperature, frequency and other design parameters
Correlating post-Si data to pre-Si power models and updating the models as needed
BS or MS (preferred) in EE or Computer engineering

SOC Design Engineer Examples

1

SOC Design Engineer Job Description

Job Description Example
Our company is looking for a SOC design engineer. We appreciate you taking the time to review the list of qualifications and to apply for the position. If you don’t fill all of the qualifications, you may still be considered depending on your level of experience.
Responsibilities for SOC design engineer
  • Develop unit/core/system level testbenches, BFMs(Bus Functional Models), checkers and assertions using verification standard methodologies
  • Layout vs
  • Participate in spec reviews, code reviews, coverage analysis, in support of corporate ISO Quality Systems
  • Work with FW/Validation/RF teams to perform FPGA system bring-up, debug and validation to meet the product development goals 
  • Position will involve working extensively on micro-architecting & PPA (Power, Performance, Area) analysis of the product
  • Candidate will perform hands on technical activities for the WSG Silicon Development Team including the creation of digital IP for mixed signal subsystems
  • Candidate will contribute to the integration of subsystems into ARM/MIPS processor based SOCs
  • This position requires expertise in Static Timing Analysis and expertise in Synopsys PrimeTime tool usage to analyze complex timing problems, triage and come up with timing fixes, ability to drive timing convergence at the assembly level of hierarchy or SoC
  • Tasks include authoring detailed functional spec, microarchitecture spec, developing surrounding logic, integration and optimization of any memories and hard macros required, and writing timing constraints
  • Development, assessment, and refinement of RTL design to target power, performance, area and timing goals
Qualifications for SOC design engineer
  • Prior experience in implementing System-On-Chip is a plus
  • Prior experience in RTL build and design automation is a plus
  • Prior experience in implementing Padring, System-On-Chip is a plus
  • Excellent communication skills and ability to interface with many groups and build consensus
  • Technical understanding of functional verification of microprocessor/ASIC designs
  • Working knowledge of languages such as C/C++/Verilog/SV/UVM/Perl
2

SOC Design Engineer Job Description

Job Description Example
Our company is looking to fill the role of SOC design engineer. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for SOC design engineer
  • Support IP, subsystem, and full-chip level verification by providing design requirements, review verification plan, functional/code coverage results, and simulation debug
  • Power state definition and management Dynamic clocking solutions Clock generation and asynchronous clock crossing strategies
  • Work with Chip Architecture, Design Verification, Physical Design, DFT, and power teams to achieve first tapeout success on designs
  • Work with cross-functional teams to make sure designs are delivered on time, and with highest quality, by incorporating proper checks at every stage of the design process
  • Oversees definition, design, verification, and documentation for SoC development
  • Performs all aspects of the "front-end" of the back-end of getting an SoC done
  • Determines block floorplan, placing memories and pins in the context of full chip floorplan
  • Work with ASIC vendor or SD team to achieve tapeout
  • Ability to deal with UPF and power domains in various tools involved in chip builds
  • Proficient in power estimation at spreadsheet level all the way through to analysis tools such as PT
Qualifications for SOC design engineer
  • Working knowledge of languages such as C/C++/Verilog/SV/UVM
  • 1 year working knowledge of Linux OS and scripting languages
  • Experience with SOC Bus Protocols such as ARM AMBA
  • General knowledge in ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture
  • BS or MS in EE
  • 5+ years of experience in RTL Logic Design of Multi-Million Gate ASICs
3

SOC Design Engineer Job Description

Job Description Example
Our growing company is hiring for a SOC design engineer. Please review the list of responsibilities and qualifications. While this is our ideal list, we will consider candidates that do not necessarily have all of the qualifications, but have sufficient experience and talent.
Responsibilities for SOC design engineer
  • PX.LEC, EM, IR, noise analysis and fixing
  • Work with the global design team to do complex SOC physical implementation for deep submicro design
  • Participates in chip level and block level backend design for complex SOC designs
  • Assist design unit owner in Register Transfer Level RTL model functional validation
  • Define VLSI Structural Design methodology and developing design flows
  • Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power
  • System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android Windows-based tablets and phones
  • Driving low coverage debug across all IPs and subsystems in our product portfolio
  • Lead a cross-site team of engineers to execute all aspects of content enabling and validation for multiple products in parallel, including ramping up new team members
  • Debugging and root-causing issues occurring anywhere in the flow, and providing tool fixes and workarounds
Qualifications for SOC design engineer
  • 5+ years of experience with Clock Generation Logic
  • 5+ years of experience in Authoring Timing Constraints
  • Minimum BSEE/BSCE/BSCS
  • Other programming skills (SystemVerilog UVM, C/C++, Perl, TCL, ) a plus
  • Experience in coding with System Verilog, Verilog and scripting languages like Perl, Python, tcl
  • Experience with scripting languages like Perl, Python, is desirable
4

SOC Design Engineer Job Description

Job Description Example
Our innovative and growing company is looking for a SOC design engineer. If you are looking for an exciting place to work, please take a look at the list of qualifications below.
Responsibilities for SOC design engineer
  • Giving recommendations on new DFT features, tools and methodologies
  • Creating and delivering effective documentation and training about Scan DFT architectures and tool flows to all who will use the DFT features and methods
  • Participating in creating solutions and solving general technical and performance issues as they are found
  • Support customer driver development to enable FPGA functions
  • Peer review of written software design specifications, peer review of developed code with other geo software engineers
  • Block-level floor planning, interconnect planning and UPF based power delivery methodology
  • Perform floor-planning and routing studies and implementation, hierarchical design planning and path clearing of complex integrated circuits and blocks
  • Strong analytical ability and analytical skills
  • Candidate will lead the integration of subsystems into ARM/MIPS processor based SOCs
  • IP Family and/or block-level floor planning
Qualifications for SOC design engineer
  • Bachelor/Master degree in Electrical/Electronic/ Computer Engineering with 8-10 years of applicable experience or minimum 2-3 years in a technical leadership role
  • 6+ years of hands on experience with integration and verification of ARM IP's , CPU, GPU, CoreSight, AXI/ACE and APB bus protocols
  • Prior experience in leading post-silicon efforts debug, validation
  • The candidate must have a Bachelor's degree or a Master's degree in Electrical Engineering, Computer Engineering or a related discipline
  • For a Bachelor's level the candidate must have unrestricted right to work in Canada without requiring sponsorship
  • Must have ME/MTech/MS in Electronics/VLSI/Communication/Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field
5

SOC Design Engineer Job Description

Job Description Example
Our company is looking for a SOC design engineer. We appreciate you taking the time to review the list of qualifications and to apply for the position. If you don’t fill all of the qualifications, you may still be considered depending on your level of experience.
Responsibilities for SOC design engineer
  • Designing modules for 32-bit microcontroller products
  • Simulating module and SoC level tests to guarantee functionality and timing with regards to design objective specifications
  • Generating and maintaining Micro Architecture Specifications (MAS) at module and SoC level and other design flow documentation
  • Running and debugging gate level simulations at SoC level
  • The ideal candidate oversees definition, design, verification, and documentation for SoC (System on a Chip) development
  • Register Transfer Level coding and simulation for SoCs
  • Timing analysis and timing closure
  • Ability to understand and develop complex software using C/C++
  • Strong working knowledge of scripting languages such as Perl, Python, and Tcl
  • Broad understanding of multiple system areas
Qualifications for SOC design engineer
  • Good Design knowledge, good basics of ASIC flow, good digital fundamentals
  • BS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 4 years of relevant experience in SOC/system design/verification or MS degree with 2 years of directly related experience with SOC Design and/or Validation Industry
  • Master/Bachelor’s Degree in Electronics Engineering or equivalent • 12+ years of experience in SoC/Block Design
  • Minimum 3 months of experience in Firmware, Digital logic design and/or verification
  • Minimum 3 months of experience in VHDL, Verilog, SystemVerilog, Java and/or C/C++
  • 5+ years of experience in ASIC design and/or verification

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